🏗 Computer Architecture - hello · Scour

I Built a 6 BIPS JIT in Five Months

unlikelyemphasis.substack.com·1d·

Discuss: Substack

⚙️JIT Compilation

KV-CoRE: Benchmarking Data-Dependent Low-Rank Compressibility of KV-Caches in LLMs

arxiv.org·1d

⚡Cache Optimization

CUDA Guide: Workflow for Performance Tuning

digitalocean.com·2d

🎮SIMT Execution

The Launch of RISC-V Now! A New Chapter in Open Computing

semiwiki.com·2d

Resourceful Computing: What Happens When We Optimize for Old Hardware?

dev.to·45m·

Discuss: DEV

🚀Performance

OSTEP Chapters 6,7

muratbuffalo.blogspot.com·1d·

Discuss: Blogger

⚙️Systems Programming

feldera/feldera: The Feldera Incremental Computation Engine

github.com·1h

The first computer chip

dfarq.homeip.net·23h

💾Retro Computing

Patriot Viper Elite 5 Ultra DDR5-6000 2x24GB Review (Page 1 of 10)

aphnetworks.com·19h

4 SSD features that matter more than raw speed

xda-developers.com·16h

Easy 6502 by skilldrick

skilldrick.github.io·1d

🌳Instruction Selection

An Analysis of User-space Idle State Instructions on x86 Processors

danglingpointers.substack.com·1d·

Discuss: Substack

⚙️CPU Microarchitecture

Hello Edge: Keyword Spotting on Microcontrollers

paperium.net·14h·

Discuss: DEV

CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions

arxiv.org·1d

🛡️Intel CET

Radxa Cubie A7S is a tiny, versatile single-board computer for $25 and up

liliputing.com·15h

🥧Raspberry Pi

Why Real-Time Execution Is Now Expected in Lakehouse Architectures

singlestore.com·16h

⏰Timely Dataflow

Examining Turbopuffer ANN v3

terencezl.github.io·1d·

Discuss: Hacker News

🚀Performance

Designing energy-efficient AI chips: Why power must be an early consideration

edn.com·2d

🔁Cache Coherence

Zinc Language Design

ziggit.dev·2h

Question - Speculation: RDNA3 + CDNA2 Architectures Thread

forums.anandtech.com·19h

⚡Hardware Acceleration

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